1. Field of the Invention
The present invention relates to information processing apparatus which switches an operation clock depending on necessity to reduce power consumption, and a media storage apparatus using the same.
2. Description of the Related Art
With the development of data processing technology in recent years, use of peripheral apparatuses, such as magnetic disk apparatuses, each having a processor that is operated by a firmware program, has increased. In a so-called information processing apparatus operated by such a processor, each individual circuit operates in synchronization by receiving a clock.
As high-speed information processing apparatuses have been required in recent years, in particular, processors, operating at high speeds using fast clocks are coming into use, as well as peripheral circuits connected to the processors. Such a fast clock is accompanied with an increase of power consumption and heat quantity. Meanwhile, when the information processing apparatus is operated with an external power supply, such as a battery, etc., reduction of power consumption is required in the information processing apparatus.
As a method for realizing both high speed and low power consumption in the information processing apparatus, it is effective to employ such a method that, when there is no request for processing during operation of the information processing apparatus, the clock supply is either switched to a low-speed clock, or suspended; and when the request for processing arises, the clock is restored to a high-speed clock, or the clock supply is restarted.
Conventionally, the above-mentioned clock switch operation has been performed in such a way that, when the processor supplied with the low-speed clock receives an interrupt request, the request is recognized by firmware processing (interrupt processing), and a clock mode register is set to a high-speed mode. Thus, a clock gate is switched, and thereby high-speed clock is supplied, as an example, in the Japanese Laid-open Patent Publication No. Hei-8-087818.
According to the conventional method of switching the clock by the firmware, clock switching can be performed as a part of firmware interrupt processing, and accordingly, no extra hardware is needed. On the other hand, a problem of an overhead time arises when switching the clock.
Namely, upon receipt of the interrupt request, the processor interprets the request by firmware, performs clock switching processing as a part of the interrupt processing, sets the clock mode in the register, and finally switches the clock. Thus, considerable time is needed to complete the switching.
Therefore, the switching processed by firmware requires a certain time period. Furthermore, since the above operation is performed while the processor is running with a low-speed clock, the processing itself is performed at low speed, and it takes time to handle the interrupt request before the inherent interrupt processing is performed with a high-speed clock. As a result, time responsibility against the interrupt request becomes degraded, caused by the clock switching performed in a low power consumption state. This impedes the merit of switching over to the high-speed clock.